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| author | Sadeep Madurange <sadeep@asciimx.com> | 2025-02-01 11:35:03 +0800 |
|---|---|---|
| committer | Sadeep Madurange <sadeep@asciimx.com> | 2025-02-01 11:35:03 +0800 |
| commit | 851fe172ee98504b3d90f5dcde47b1207fde54cf (patch) | |
| tree | 5086b909e409a0723c23a3f75e9e95c593ab4161 | |
| parent | 50deb9d280254c8e17624b368ea778f69dd86767 (diff) | |
| download | smart-home-851fe172ee98504b3d90f5dcde47b1207fde54cf.tar.gz | |
Define registers.
| -rw-r--r-- | nRF24L01/radio.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/nRF24L01/radio.c b/nRF24L01/radio.c index 88e0c51..cd27c28 100644 --- a/nRF24L01/radio.c +++ b/nRF24L01/radio.c @@ -20,29 +20,29 @@ #define NRF24L01_REG_CONFIG 0x00 #define NRF24L01_REG_EN_AA 0x01 #define NRF24L01_REG_EN_RXADDR 0x02 -#define NRF24L01_REG_SETUP_AW 0x00 -#define NRF24L01_REG_SETUP_RETR 0x00 -#define NRF24L01_REG_RF_CH 0x00 -#define NRF24L01_REG_RF_SETUP 0x00 -#define NRF24L01_REG_STATUS 0x00 -#define NRF24L01_REG_OBSERVE_TX 0x00 -#define NRF24L01_REG_RPD 0x00 -#define NRF24L01_REG_RX_ADDR_P0 0x00 -#define NRF24L01_REG_RX_ADDR_P1 0x00 -#define NRF24L01_REG_RX_ADDR_P2 0x00 -#define NRF24L01_REG_RX_ADDR_P3 0x00 -#define NRF24L01_REG_RX_ADDR_P4 0x00 -#define NRF24L01_REG_RX_ADDR_P5 0x00 -#define NRF24L01_REG_TX_ADDR 0x00 -#define NRF24L01_REG_RX_PW_P0 0x00 -#define NRF24L01_REG_RX_PW_P1 0x00 -#define NRF24L01_REG_RX_PW_P2 0x00 -#define NRF24L01_REG_RX_PW_P3 0x00 -#define NRF24L01_REG_RX_PW_P4 0x00 -#define NRF24L01_REG_RX_PW_P5 0x00 -#define NRF24L01_REG_FIFO_STATUS 0x00 -#define NRF24L01_REG_DYNPD 0x00 -#define NRF24L01_REG_FEATURE 0x00 +#define NRF24L01_REG_SETUP_AW 0x03 +#define NRF24L01_REG_SETUP_RETR 0x04 +#define NRF24L01_REG_RF_CH 0x05 +#define NRF24L01_REG_RF_SETUP 0x06 +#define NRF24L01_REG_STATUS 0x07 +#define NRF24L01_REG_OBSERVE_TX 0x08 +#define NRF24L01_REG_RPD 0x09 +#define NRF24L01_REG_RX_ADDR_P0 0x0A +#define NRF24L01_REG_RX_ADDR_P1 0x0B +#define NRF24L01_REG_RX_ADDR_P2 0x0C +#define NRF24L01_REG_RX_ADDR_P3 0x0D +#define NRF24L01_REG_RX_ADDR_P4 0x0E +#define NRF24L01_REG_RX_ADDR_P5 0x0F +#define NRF24L01_REG_TX_ADDR 0x10 +#define NRF24L01_REG_RX_PW_P0 0x11 +#define NRF24L01_REG_RX_PW_P1 0x12 +#define NRF24L01_REG_RX_PW_P2 0x13 +#define NRF24L01_REG_RX_PW_P3 0x14 +#define NRF24L01_REG_RX_PW_P4 0x15 +#define NRF24L01_REG_RX_PW_P5 0x16 +#define NRF24L01_REG_FIFO_STATUS 0x17 +#define NRF24L01_REG_DYNPD 0x1C +#define NRF24L01_REG_FEATURE 0x1D static inline uint8_t read_reg(uint8_t reg) { |