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authorSadeep Madurange <sadeep@asciimx.com>2025-08-17 11:58:58 +0800
committerSadeep Madurange <sadeep@asciimx.com>2025-08-17 11:58:58 +0800
commit768ae230f9f8100715533dab49a3cf49f839d6be (patch)
treeddd6fb88e851341c1e92ae0bebac6d157fc18c9f
parent8bf93bfd50113ec09ec5cb231634527569c50c20 (diff)
downloadfpm-door-lock-768ae230f9f8100715533dab49a3cf49f839d6be.tar.gz
Use MOSFET.
-rw-r--r--main.c112
1 files changed, 29 insertions, 83 deletions
diff --git a/main.c b/main.c
index ddf8f42..6967083 100644
--- a/main.c
+++ b/main.c
@@ -1,4 +1,5 @@
#include <stdint.h>
+#include <stdlib.h>
#include <avr/wdt.h>
#include <avr/sleep.h>
#include <avr/interrupt.h>
@@ -19,6 +20,7 @@
#define LED_DDR DDRB
#define LED_PORT PORTB
+#define PWR_BATCHK PB2
#define PWR_SERVO PB3
#define PWR_FPM PB4
#define PWR_DDR DDRB
@@ -100,10 +102,22 @@ static inline void flash_led(void)
}
}
+static inline void pwr_batchk_on(void)
+{
+ PWR_PORT &= ~(1 << PWR_BATCHK);
+}
+
+static inline void pwr_batchk_off(void)
+{
+ PWR_PORT |= (1 << PWR_BATCHK);
+}
+
static inline uint16_t getbat(void)
{
uint16_t vbg;
+ pwr_batchk_on();
+
ADMUX |= (1 << REFS1) | (1 << REFS0);
ADCSRA |= (1 << ADEN) | (1 << ADPS2) | (1 << ADPS1); /* clk: 50-200 kHz */
@@ -117,6 +131,8 @@ static inline uint16_t getbat(void)
ADCSRA &= ~(1 << ADEN);
vbg = (1100UL * ADC) / 1024;
ADCSRA &= ~(1 << ADEN);
+
+ pwr_batchk_off();
// 56k/10k voltage divider
return (vbg * 66) / 10;
@@ -126,98 +142,28 @@ int main(void)
{
uint16_t id;
- /* disable watchdog timer */
- cli();
- wdt_reset();
- MCUSR &= ~(1 << WDRF);
- WDTCSR |= (1 << WDCE) | (1 << WDE);
- WDTCSR = 0x00;
-
uart_init();
- PWR_DDR |= (1 << PWR_FPM) | (1 << PWR_SERVO);
- pwron_fpm();
- fpm_init();
-
- /* servo */
- TCCR1A |= (1 << WGM11);
- TCCR1B |= (1 << WGM12) | (1 << WGM13);
- TCCR1B |= (1 << CS11);
- ICR1 = PWM_TOP;
- TCCR1A |= (1 << COM1A1);
- SERVO_DDR |= (1 << SERVO_PIN);
+
+ PWR_DDR |= (1 << PWR_BATCHK);
+ pwr_batchk_off();
/* bat check */
LED_DDR |= (1 << LED_PIN);
LED_PORT &= ~(1 << LED_PIN);
- /* input ports */
- INPUT_DDR &= ~((1 << BACK_LOCK_PIN) | (1 << BACK_UNLOCK_PIN) |
- (1 << FRONT_LOCK_PIN) | (1 << FRONT_UNLOCK_PIN) |
- (1 << ENROLL_PIN));
-
- INPUT_PORT |= ((1 << BACK_LOCK_PIN) | (1 << BACK_UNLOCK_PIN) |
- (1 << FRONT_LOCK_PIN) | (1 << FRONT_UNLOCK_PIN) |
- (1 << ENROLL_PIN));
-
- EICRA = 0b00000000;
- EIMSK = (1 << FPM_UNLOCK_INT);
-
- PCICR |= (1 << PCIE2);
- PCMSK2 |= ((1 << FRONT_LOCK_INT) | (1 << ENROLL_INT) |
- (1 << BACK_LOCK_INT) | (1 << BACK_UNLOCK_INT));
-
flash_led();
+ char s[5];
+ s[4] = 0;
+
for (;;) {
- switch(cmd) {
- case LOCK_FRONT:
- lock();
- fpm_led(FLASH, RED, 1);
- break;
- case LOCK_BACK:
- lock();
- break;
- case UNLOCK_FRONT:
- if (fpm_match()) {
- fpm_led(BREATHE, BLUE, 1);
- unlock();
- } else {
- fpm_led(BREATHE, RED, 1);
- }
- break;
- case UNLOCK_BACK:
- unlock();
- fpm_led(FLASH, BLUE, 1);
- break;
- case ENROLL:
- id = fpm_match();
- if (id == 1 || id == 2) {
- fpm_led(BREATHE, BLUE, 1);
- _delay_ms(1000);
- if (fpm_enroll())
- fpm_led(BREATHE, BLUE, 1);
- else
- fpm_led(BREATHE, RED, 1);
- }
- break;
- default:
- break;
- }
-
- cmd = NONE;
- _delay_ms(500);
-
- pwroff_fpm();
- set_sleep_mode(SLEEP_MODE_PWR_DOWN);
- sleep_enable();
- sleep_bod_disable();
- sei();
- sleep_cpu();
-
- cli();
- sleep_disable();
- pwron_fpm();
- fpm_init();
+ id = getbat();
+ itoa(id, s, 10);
+ for (int i = 0; i < 4; i++)
+ uart_send((uint8_t)s[i]);
+ uart_send('\r');
+ uart_send('\n');
+ _delay_ms(1000);
}
return 0;