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<h2 class="center" id="title">BARE-METAL ATSAM3X8E</h2>
<h5 class="center">16 SEPTEMBER 2024</h5>
<br>
<div class="twocol justify"><p>Notes on programming bare-metal ATSAM3X8E chips (Arduino Due) using Serial Wire
Debug (SwD) protocol.</p>
<h2 id="toolchain">Toolchain</h2>
<p>ST-LINK/V2 programmer, OpenOCD, ARM GNU Compiler Toolchain.</p>
<h2 id="electrical-connections">Electrical connections</h2>
<table style="border: none; width: 100%;">
<tr style="border: none;">
<td style="border: none; width: 50%; vertical-align: top; background-color: transparent;">
<img src="schematic.png" alt="Pinout" style="width: 100%" />
<p style="text-align: center;">Wiring</p>
</td>
<td style="border: none; width: 50%; vertical-align: top; background-color: transparent;">
<img src="connections.jpeg" alt="Circuit" style="width: 100%" />
<p style="text-align: center;">Arduino Due</p>
</td>
</tr>
</table>
<p>Arduino Due exposes the ATSAM3X8E’s SWD interface via its DEBUG port. The
ST-LINK/v2 programmer connects to that to communicate with the chip.</p>
<h2 id="upload-procedure">Upload procedure</h2>
<p>Build. Magic is in the script.ld linker script.</p>
<div class="language-plaintext highlighter-rouge"><div class="highlight"><pre class="highlight"><code>$ arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb -T script.ld \
-nostartfiles \
-nostdlib \
-o a.elf main.c
</code></pre></div></div>
<p>Upload using OpenOCD:</p>
<div class="language-plaintext highlighter-rouge"><div class="highlight"><pre class="highlight"><code>$ openocd -f openocd-due.cfg
$ telnet localhost 4444
> halt
> at91sam3 gpnvm show
> at91sam3 gpnvm set 1
> at91sam3 gpnvm show
$ openocd -f openocd-due.cfg -c "program a.elf verify reset exit"
</code></pre></div></div>
<p>First command starts OpenOCD. Telnet session halts chip, checks GPNVM bit. If
unset (returns 0), set to 1 and verify. Final command uploads program. See
OpenOCD manual AT91SAM3 flash driver section for full command list.</p>
<h2 id="gpnvm-bits">GPNVM bits</h2>
<p>ARM chips boot into address 0x00000. ATSAM3X8E has ROM and dual-banked flash
(flash0/flash1) at different addresses. GPNVM bits control which maps to
0x00000.</p>
<p>GPNVM1 cleared (default): boots from ROM (Atmel SAM-BA bootloader). GPNVM1=1,
GPNVM2=0: flash0 (0x80000) maps to 0x00000. Both cleared: flash1 maps to
0x00000.</p>
<p>Program goes in flash0, so set GPNVM1=1 to boot our code instead of bootloader.</p>
<h2 id="linker-script-notes">Linker script notes</h2>
<p>Vector table must be at first flash address–required for ARM chips unless
relocated using VTOR register.</p>
<p>First vector table entry: stack pointer. Initialize to highest memory location
(ATSAM3X8E has descending stack).</p>
<p>Second entry: reset vector. Place initialization code here (zero memory, set
registers) before jumping to main().</p>
<p>Commit:
<a href="https://git.asciimx.com/bare-metal-arduino-due/commit/?id=318496925ca76668dd9d63c3d060376f489276f8">3184969</a></p>
</div>
<p class="post-author right">by W. D. Sadeep Madurange</p>
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