---
title: Bare-metal ATSAM3X8E
date: 2024-09-16
layout: post
---
Notes on programming bare-metal ATSAM3X8E chips (Arduino Due) using Serial Wire
Debug (SwD) protocol.
## Toolchain
ST-LINK/V2 programmer, OpenOCD, ARM GNU Compiler Toolchain.
## Electrical connections
Wiring
|
Arduino Due
|
Arduino Due exposes the ATSAM3X8E's SWD interface via its DEBUG port. The
ST-LINK/v2 programmer connects to that to communicate with the chip.
## Upload procedure
Build. Magic is in the script.ld linker script.
```
$ arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb -T script.ld \
-nostartfiles \
-nostdlib \
-o a.elf main.c
```
Upload using OpenOCD:
```
$ openocd -f openocd-due.cfg
$ telnet localhost 4444
> halt
> at91sam3 gpnvm show
> at91sam3 gpnvm set 1
> at91sam3 gpnvm show
$ openocd -f openocd-due.cfg -c "program a.elf verify reset exit"
```
First command starts OpenOCD. Telnet session halts chip, checks GPNVM bit. If
unset (returns 0), set to 1 and verify. Final command uploads program. See
OpenOCD manual AT91SAM3 flash driver section for full command list.
## GPNVM bits
ARM chips boot into address 0x00000. ATSAM3X8E has ROM and dual-banked flash
(flash0/flash1) at different addresses. GPNVM bits control which maps to
0x00000.
GPNVM1 cleared (default): boots from ROM (Atmel SAM-BA bootloader). GPNVM1=1,
GPNVM2=0: flash0 (0x80000) maps to 0x00000. Both cleared: flash1 maps to
0x00000.
Program goes in flash0, so set GPNVM1=1 to boot our code instead of bootloader.
## Linker script notes
Vector table must be at first flash address--required for ARM chips unless
relocated using VTOR register.
First vector table entry: stack pointer. Initialize to highest memory location
(ATSAM3X8E has descending stack).
Second entry: reset vector. Place initialization code here (zero memory, set
registers) before jumping to main().
Commit:
[3184969](https://git.asciimx.com/bare-metal-arduino-due/commit/?id=318496925ca76668dd9d63c3d060376f489276f8)